1. Technical Field
Various embodiments of the present disclosure may generally relate to driving circuits of semiconductor devices and, more particularly, to high voltage output drivers with low voltage devices.
2. Related Art
System-on-chips (SOCs) have required fast interface circuits operating at a low supply voltage. In response to such a requirement, a triple gate oxide (TGO) process technique has been applied to the fabrication of the SOCs. Each of the SOCs fabricated using the triple gate oxide process technique may consist of three kinds of MOS transistors. One of the three kinds of MOS transistors are formed to have a relatively thin gate oxide suitable for a low voltage operation performance in core regions, another of the three kinds of MOS transistors are formed to have a normal gate oxide suitable for a medium voltage operation for performance in the peripheral regions, and the other of the three kinds of MOS transistors are formed to have a relatively thick gate oxide suitable for a high voltage operation performance in the input and output (input/output) (I/O) circuits (e.g., I/O buffer circuits). Recently, however, as semiconductor devices of the SOCs become more highly integrated, a dual gate oxide (DGO) process technique instead of the TGO process technique has been applied to fabrication of the SOCs to avoid these complicated processes. That is, MOS transistors having a relatively thin gate oxide suitable for a low voltage operation of the core regions and MOS transistors having a relatively thick gate oxide suitable for a high voltage operation of the peripheral regions including the I/O buffer regions have been employed in the semiconductor devices of the SOCs. For example, if process techniques for realizing fine patterns having a line width of 32 nanometers or less are applied to fabrication of the semiconductor devices, MOS transistors having a thin gate oxide suitable for a 0.9-volt operation and MOS transistors having a thick gate oxide suitable for a 1.8-volt operation or a 2.5-volt operation have been used in the semiconductor devices.
If only the MOS transistors for a 2.5-volt operation are used in the semiconductor devices, there may be some limitations in supporting a fast interface employing a serial advanced technology attachment (SATA) scheme or a double data rate 3 (DDR3) scheme because of a low performance operation of the MOS transistors for a 2.5-volt operation. In the event that only the MOS transistors for a 0.9-volt operation or a 1.8-volt operation are used in the semiconductor devices, the reliability of the MOS transistors for a 0.9-volt operation or a 1.8-volt operation may not be guaranteed if a high voltage interface operation (e.g., a 3.3 volt interface operation) used in an ATA scheme or a consumer electronics ATA (CE-ATA) scheme is performed. Thus, in such a case, it may be necessary to use the MOS transistors for a 0.9-volt operation as default transistors and to provide an input/output (I/O) interface circuit which is capable of selectively supporting the MOS transistors for a 1.8-volt operation or a 2.5-volt operation.
Recently, all of a low voltage corresponding to a core voltage of about 0.9 volts, a medium voltage corresponding to a first I/O voltage of about 1.8 volts, and a high voltage corresponding to a second I/O voltage of about 3.3 volts have been used in driving output drivers to support all kinds of interface protocols operating in a wide range supply voltage. In such a case, a dual gate oxide (DGO) process technique is used in realizing the cell transistors constituting an internal circuit with low voltage MOS transistors having a relatively thin gate oxide layer as well as for realizing interface solution devices for medium and high voltage operations with medium voltage MOS transistors having a relatively thick gate oxide layer. However, as described above, the reliability of the medium voltage MOS transistors is not guaranteed if a high voltage interface operation condition is applied to the medium voltage MOS transistors. In particular, while a voltage applied to pads of the output drivers changes from a low voltage into a high voltage or vice versa to trigger the output drivers, the medium voltage MOS transistors included in the output drivers may be damaged due to the high voltage.